International Conference on Hardware/Software Codesign and System Synthesis
CODES+ISSS 2022
- URL: https://esweek.org/codes-isss/
- Event Date: 2022-10-07 ~ 2022-10-14
- Abstract Submission Date: 2022-03-31
- Submission Date: 2022-04-07
=========================================================================
CODES+ISSS 2022
Call for Papers
International Conference on
Hardware/Software Codesign and System Synthesis
October 07 – October 14, 2022, Hybrid-Shanghai
=========================================================================
The International Conference on Hardware/Software Codesign and System
Synthesis (CODES+ISSS) is the premier conference in system-level design,
hardware/software co-design, modeling, analysis, and implementation of
modern Embedded Systems, Cyber-Physical Systems, and Internet-of-Things,
from system-level specification and optimization to system synthesis of
multi-processor hardware/software implementations. CODES+ISSS is part of
Embedded Systems Week (ESWEEK), the premier event covering all aspects
of hardware and software design for smart, intelligent and connected
computing systems.
https://esweek.org/codesisss-call-for-papers-page/
-------------------------------------------------------------------------
Timeline
-------------------------------------------------------------------------
Journal-Track Submissions
- Abstracts: March 31, 2022 (AoE, Firm)
- Full Papers: April 7, 2022 (AoE, Firm)
Work-in-Progress Submissions
- June 11, 2022 (AoE, Firm)
Notification of Acceptance
- July 5, 2022 (both tracks)
-------------------------------------------------------------------------
Topics of Interests / Tracks
-------------------------------------------------------------------------
Track 1: System-level design – Specification, modeling, refinement,
synthesis, and partitioning of embedded systems, hardware-software
co-design, hybrid system modeling and design, model-based design,
design for adaptivity and reconfigurability.
Track 2: Domain and application-specific design – Analysis, design,
and optimization techniques for multimedia, medical, automotive,
cyber-physical, IoT, and other application domains.
Track 3: System architecture – Heterogeneous systems, many-cores,
and distributed systems, architecture and micro-architecture design,
exploration and optimizations of application-specific processors and
accelerators, reconfigurable and self-adaptive architectures, storage,
memory systems, and networks-on-chip.
Track 4: Simulation, validation, and verification – Hardware/software
co-simulation, verification, and validation methodologies, formal
verification, hardware-accelerated simulation, simulation, and
verification languages, models, and benchmarks.
Track 5: Embedded software – Language and library support, compilers,
runtimes, parallelization, software verification, memory management,
virtual machines, operating systems, real-time support, middleware.
Track 6: Safety, security, and reliability – Cross-layer reliability,
resiliency and fault tolerance, test methodology, design for security,
reliability, and testability, hardware security, security for embedded,
CPS, and IoT devices.
Track 7: Power-aware systems – Power-aware and energy-aware system
design and methodologies, ranging from low-power embedded and cyber-
physical systems, IoT devices, to energy-efficient large-scale systems
such as cloud datacenters, green computing, and smart grids.
Track 8: Embedded machine learning – Hardware and software design,
implementation, and optimization for machine learning that are
specially designed for resource- and power-constrained embedded,
CPS, and IoT devices.
Track 9: Industrial practices and case studies – Practical impact on
current and/or future industries, application of state-of-the-art
methodologies and tools in areas including wireless, networking,
multimedia, automotive, cyber-physical, medical systems, IoT, etc.
-------------------------------------------------------------------------
Journal-Integrated Publication Model
-------------------------------------------------------------------------
CODES+ISSS 2022 solicits the submission of original research articles in
two categories, i) full-length research papers that will be published in
the IEEE Transactions on Computer-Aided Design of Integrated Circuits
and Systems (TCAD), and ii) short Work-in-Progress papers that will be
published in the CODES+ISSS Proceedings. For both categories, CODES+ISSS
solicits submission on the following topics. More information about the
submission is at https://www.esweek.org/author-information.
-------------------------------------------------------------------------
Organization
-------------------------------------------------------------------------
CODES+ISSS Program Chairs:
Chengmo Yang, University of Delaware, US
Mohammad Al Faruque, University of California, Irvine, US
ESWEEK General Chairs:
Aviral Shrivastava, Arizona State University, US
Xiaobo Sharon Hu, General Co-Chair, University of Notre Dame, US
www.esweek.org
CODES+ISSS 2022
Call for Papers
International Conference on
Hardware/Software Codesign and System Synthesis
October 07 – October 14, 2022, Hybrid-Shanghai
=========================================================================
The International Conference on Hardware/Software Codesign and System
Synthesis (CODES+ISSS) is the premier conference in system-level design,
hardware/software co-design, modeling, analysis, and implementation of
modern Embedded Systems, Cyber-Physical Systems, and Internet-of-Things,
from system-level specification and optimization to system synthesis of
multi-processor hardware/software implementations. CODES+ISSS is part of
Embedded Systems Week (ESWEEK), the premier event covering all aspects
of hardware and software design for smart, intelligent and connected
computing systems.
https://esweek.org/codesisss-call-for-papers-page/
-------------------------------------------------------------------------
Timeline
-------------------------------------------------------------------------
Journal-Track Submissions
- Abstracts: March 31, 2022 (AoE, Firm)
- Full Papers: April 7, 2022 (AoE, Firm)
Work-in-Progress Submissions
- June 11, 2022 (AoE, Firm)
Notification of Acceptance
- July 5, 2022 (both tracks)
-------------------------------------------------------------------------
Topics of Interests / Tracks
-------------------------------------------------------------------------
Track 1: System-level design – Specification, modeling, refinement,
synthesis, and partitioning of embedded systems, hardware-software
co-design, hybrid system modeling and design, model-based design,
design for adaptivity and reconfigurability.
Track 2: Domain and application-specific design – Analysis, design,
and optimization techniques for multimedia, medical, automotive,
cyber-physical, IoT, and other application domains.
Track 3: System architecture – Heterogeneous systems, many-cores,
and distributed systems, architecture and micro-architecture design,
exploration and optimizations of application-specific processors and
accelerators, reconfigurable and self-adaptive architectures, storage,
memory systems, and networks-on-chip.
Track 4: Simulation, validation, and verification – Hardware/software
co-simulation, verification, and validation methodologies, formal
verification, hardware-accelerated simulation, simulation, and
verification languages, models, and benchmarks.
Track 5: Embedded software – Language and library support, compilers,
runtimes, parallelization, software verification, memory management,
virtual machines, operating systems, real-time support, middleware.
Track 6: Safety, security, and reliability – Cross-layer reliability,
resiliency and fault tolerance, test methodology, design for security,
reliability, and testability, hardware security, security for embedded,
CPS, and IoT devices.
Track 7: Power-aware systems – Power-aware and energy-aware system
design and methodologies, ranging from low-power embedded and cyber-
physical systems, IoT devices, to energy-efficient large-scale systems
such as cloud datacenters, green computing, and smart grids.
Track 8: Embedded machine learning – Hardware and software design,
implementation, and optimization for machine learning that are
specially designed for resource- and power-constrained embedded,
CPS, and IoT devices.
Track 9: Industrial practices and case studies – Practical impact on
current and/or future industries, application of state-of-the-art
methodologies and tools in areas including wireless, networking,
multimedia, automotive, cyber-physical, medical systems, IoT, etc.
-------------------------------------------------------------------------
Journal-Integrated Publication Model
-------------------------------------------------------------------------
CODES+ISSS 2022 solicits the submission of original research articles in
two categories, i) full-length research papers that will be published in
the IEEE Transactions on Computer-Aided Design of Integrated Circuits
and Systems (TCAD), and ii) short Work-in-Progress papers that will be
published in the CODES+ISSS Proceedings. For both categories, CODES+ISSS
solicits submission on the following topics. More information about the
submission is at https://www.esweek.org/author-information.
-------------------------------------------------------------------------
Organization
-------------------------------------------------------------------------
CODES+ISSS Program Chairs:
Chengmo Yang, University of Delaware, US
Mohammad Al Faruque, University of California, Irvine, US
ESWEEK General Chairs:
Aviral Shrivastava, Arizona State University, US
Xiaobo Sharon Hu, General Co-Chair, University of Notre Dame, US
www.esweek.org
Journal Promotion
|
| Acta Koreana (Acta Koreana) |
|
| Acta Via Serica (AVS) |
|
| Computers and Concrete (CAC) |
|
| Journal of Information Processing Systems (JIPS) |
|
| Journal of Internet Computing and Services (KSII - JICS) |
|
| Journal of Smart Tourism (Smart Tourism) |
|
| Membrane and Water Treatment (MWT) |
|
| Wind and Structures, An International Journal (Wind and Structures) |
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